Autômatos celulares aplicados em acústica linear e sua implementação em hardware reconfigurável

Abstract

In acoustics, the field of physics that studies the behavior of sound waves, it is common to use simulations to approximate the behavior of sound waves under certain conditions. These simulations are important in the study and design of room acoustics such as theaters, auditoriums, musical instrumentals, vehicle cabins, among others, which can be described using linear acoustic behavior. However, such simulations are limited by the computational complexity of solving the differential equations describing the acoustic phenomena. To simplify these calculations, numerical methods are often used to reduce the computational cost of these simulations. These approaches reduce the computational complexity of the required calculations and allow the use of hardware accelerators. This research started with a study of acoustic wave propagation using the Digital Waveguide (DWG) model, which is commonly used to emulate sound wave propagation. As a result of this study, a step-by-step formulation for the DWG is presented, introducing a method that considers local impedance changes to accurately characterize reflection phenomena and transmission of sound waves. One of the disadvantages of the DWG model is that the sound is only propagated in one preferential direction between adjacent scattering joints. To overcome this disadvantage, in this thesis, a two-dimensional cellular automata model is developed to emulate acoustic wave propagation (CA2D), which is embedded in a hardware accelerator using Field Programmable Gate Arrays (FPGAs). The cellular automata model is based on simple rules defined by the user that make use of low-computational cost operators. For both the DWG and the CA2D models, a 64 × 64 elements system was implemented in software using the PYTHON language. This system was first stimulated with a 1 KHz sinusoidal signal and then with a G major guitar chord signal. The response of the system was characterized using Fast Fourier Transform (FFT) and Power Spectral Density (PSD) as evaluation and comparison criteria. Software execution time was estimated for both models. After evaluating the coherence of the CA2D, a hardware architecture was developed to implement it on an FPGA. This hardware architecture was developed in VHDL using Vivado 2018.3 software and embedded in the Pynq-Z2 and ZCU 104 System on Chip (SoC) FPGAs. This hardware architecture uses floating-point addition and multiplication IP cores to perform the necessary arithmetic operations, and the ComBlock third-party IP core that allows the SoC FPGA to communicate with a computer via an Ethernet connection. The hardware implementation consists of three different cells: the source cell, the wall cell, and the mesh cells. A VHDL code generator tool, called vCA2Dgen, was developed to facilitate the hardware implementation of the CA2D model. Due to the resources available on the chosen FPGA, only two systems were implemented, one with 10𝑥10 elements and the other one with 20𝑥20 elements. The two systems were stimulated with the two signals previously used in software, and the FFT and PSD were also used as validation and comparison criteria. In hardware, the execution time was estimated from the behavioral simulation and measured using the ILA core tool. The on-board CA in hardware was shown to be approximately 6.12 times faster than the CA2D in software but was limited by the available hardware resources.